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## ##################################################
## GPIO Led 8 led array on bank NA (Optional)
## ##################################################
Pin_out   "RED_LEDS[0]"   Loc = "IO_NA_A0";
Pin_out   "RED_LEDS[1]"   Loc = "IO_NA_A1";
Pin_out   "RED_LEDS[2]"   Loc = "IO_NA_A2";
Pin_out   "RED_LEDS[3]"   Loc = "IO_NA_A3";
Pin_out   "RED_LEDS[4]"   Loc = "IO_NA_A4";
Pin_out   "RED_LEDS[5]"   Loc = "IO_NA_A5";
Pin_out   "RED_LEDS[6]"   Loc = "IO_NA_A6";
Pin_out   "RED_LEDS[7]"   Loc = "IO_NA_A7";

## ##################################################
## GPIO Led 8 led array on PMOD (Optional)
## ##################################################
Pin_out   "PMOD_LEDS[0]"   Loc = "IO_EA_B7";
Pin_out   "PMOD_LEDS[1]"   Loc = "IO_EA_A7";
Pin_out   "PMOD_LEDS[2]"   Loc = "IO_EA_B6";
Pin_out   "PMOD_LEDS[3]"   Loc = "IO_EA_A6";
Pin_out   "PMOD_LEDS[4]"   Loc = "IO_EA_B5";
Pin_out   "PMOD_LEDS[5]"   Loc = "IO_EA_A5";
Pin_out   "PMOD_LEDS[6]"   Loc = "IO_EA_B4";
Pin_out   "PMOD_LEDS[7]"   Loc = "IO_EA_A4";

## ##################################################
## GPIO Led 8 rgb led array on bank NB (Optional)
## ##################################################
Pin_out   "RGB_LEDS[0]"   Loc = "IO_NB_A0";
Pin_out   "RGB_LEDS[1]"   Loc = "IO_NB_A1";
Pin_out   "RGB_LEDS[2]"   Loc = "IO_NB_A2";
Pin_out   "RGB_LEDS[3]"   Loc = "IO_NB_A3";
Pin_out   "RGB_LEDS[4]"   Loc = "IO_NB_A4";
Pin_out   "RGB_LEDS[5]"   Loc = "IO_NB_A5";
Pin_out   "RGB_LEDS[6]"   Loc = "IO_NB_A6";
Pin_out   "RGB_LEDS[7]"   Loc = "IO_NB_A7";
Pin_out    "RGB_R"         Loc = "IO_NB_B0";
Pin_out    "RGB_B"         Loc = "IO_NB_B1";
Pin_out    "RGB_G"         Loc = "IO_NB_B2";

I also defined the fpga led in my ccf file:

Code Select

Net "LED" Loc = "IO_SB_B6";

-------------------------
The enriched blink verilog file, based on the colognechip demo, is the following:
`timescale 1ns / 1ps

Code Select

module blink(
		input wire CLK,
		input wire RESET,
		output wire LED, // pmod blinks 2 or 5
		output wire [7:0] RED_LEDS
	);

	reg [26:0] counter;
    reg [7:0] sum = 8'b11111111;

	wire clk270, clk180, clk90, clk0, usr_ref_out;
	wire usr_pll_lock_stdy, usr_pll_lock;

	CC_PLL #(
		.REF_CLK(10.0),      // reference input in MHz
		.OUT_CLK(100.0),     // pll output frequency in MHz
		.PERF_MD("SPEED"), // LOWPOWER, ECONOMY, SPEED
		.LOW_JITTER(1),      // 0: disable, 1: enable low jitter mode
		.CI_FILTER_CONST(2), // optional CI filter constant
		.CP_FILTER_CONST(4)  // optional CP filter constant
	) pll_inst (
		.CLK_REF(CLK), .CLK_FEEDBACK(1'b0), .USR_CLK_REF(1'b0),
		.USR_LOCKED_STDY_RST(1'b0), .USR_PLL_LOCKED_STDY(usr_pll_lock_stdy), .USR_PLL_LOCKED(usr_pll_lock),
		.CLK270(clk270), .CLK180(clk180), .CLK90(clk90), .CLK0(clk0), .CLK_REF_OUT(usr_ref_out)
	);

	assign LED = counter[26];

	assign RED_LEDS = sum;

	always @(posedge clk0)
	begin
		if (!RESET) begin
			counter <= 0;
		end else begin
			counter <= counter + 1'b1;
		end

        if ( &counter[22:0] ) begin
            sum <= sum - 1;
        end

	end

endmodule

It compiles just fine, but the FPGA_LED is not blinking, but the 3rd led on the pmod module. The red led series blinks just fine.

The PMOD and rgb led modules are not present in the module, just the fpga_led and the red_leds, but physically, they are present and connected via wires.

If I change the "LED" name to "led" in the .ccf and the .v file (3 occurences), there is no blinking at all.

Tried to read the schema to find out how pin IO_SB_B6 is related to IO_EA_B6 or IO_EA_A5, but found nothing.

I am sure I made some serious mistake, but don't know what.

I am using the 01.09.2024 revision of colognechip gatemate, with a hand compiled openFPGALoader for a debian bookworm system.

#34

ESP32 / When to expect an ESP32-C6-EVB...

Last post by mw75 - September 15, 2024, 03:09:02 PM

The subject says it all. Would like to order some more ESP32-C6-EVB, but with external antenna.

Thanks for an estimation.

Regards,
Mario

#35

A20 / Re: eMMC, NAND, and SPI Flash ...

Last post by LubOlimex - September 12, 2024, 02:42:43 PM

eMMC can be used as additional storage, but it can also be used as boot medium (after you run olinuxino-sd-to-emmc it will transfer the Linux from the SD card to the eMMC)

Hard to say if it will improve performance, it would depend on the SD card you are using. Some faster cards might be faster than the eMMC speed. I guess it can be tested empirically just dd some large file and check the average transfer speed when copying the file from one location of the card to another and when writing it from the card to the emmc and when writing the same file from one location of the emmc to another location on the emmc.

By the way you can also attach SSD or hard disk to the board, it can also be used as storage or boot medium. You need a 5V hard disk and this cable set:

https://www.olimex.com/Products/Components/Cables/SATA-CABLE-SET/

#36

A20 / Re: eMMC, NAND, and SPI Flash ...

Last post by HardDriveStand214 - September 12, 2024, 09:58:32 AM

> What do you mean by home media server? What media are you going to play? I am not sure if the A20-OLinuXino-LIME2 boards are suitable for playing high bitrate videos. About the questions:

More of a storage backup sever than anything. As long as I can use it to automatically save files to a USB storage device.

_______________

Is eMMC just like additional storage (as if you were utilizing a USB, SD card, etc.)? Or does it help improve processing power?

Thank you so much for your help. I immensely appreciate it.

#37

A64 / Re: Olimex A64-OlinuxIno-1G no...

Last post by Mattis Fjallstrom - September 11, 2024, 08:52:39 PM

Good news!

I couldn't get Balena Etcher to work right on my Linux machine, but in the end it didn't matter. I re-flashed the SD card (using dd), tried it again, and it worked this time. All good. Thanks!

#38

A64 / Re: Olimex A64-OlinuxIno-1G no...

Last post by LubOlimex - September 11, 2024, 08:27:41 AM

Most of the problems with first time boot are related to the SD card and the preparation. If the SD card was faulty or if there was something left over on the card when you ran dd there would be nothing. If re-writing with Balena Etcher doesn't make it work, maybe the card is faulty, try with another one.

Refer to page 7 of chapter "2.3. Download the image to an SD card" on common problems with the cards and preparing the image:

https://github.com/OLIMEX/OLINUXINO/blob/master/DOCUMENTS/OLIMAGE/Olimage-guide.pdf

#39

A64 / Re: Olimex A64-OlinuxIno-1G no...

Last post by Mattis Fjallstrom - September 10, 2024, 07:20:52 PM

Thanks for the reply.

That is the image I'm using, and I'm using the 5V power-supply that was recommended for this board on Olimex website. The red LED (indicating power) comes on when I connect it.

I've tried switching RX/TX and yes, GND is connected. Still nothing at all, not even garbage. I've also tried switching out the UART/USB cable for another one (that I know works with a different board computer). Still nothing.

I'll try Etcher - I use dd on Linux out of habit. Still though, even without an SD card, shouldn't there be _something_ on the UART? Some boot information?

For the UART, I'm using 115200, 8/1, and I've tried both None and Xon/Xoff for flow control.

Thanks again, let's see if we can get this fixed!

#40

ESP32 / Re: ESP32-POE-EA-IND

Last post by LubOlimex - September 10, 2024, 03:03:10 PM

No, but you can measure if there is voltage and how high it is between those two grounds before connecting them.

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