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#51

A64 / Re: Debian GNU/Linux 13 (Trixi...

Last post by Roman - May 10, 2026, 06:30:56 PM

Here is my first attempt at installing Debian Trixie for testing.

I downloaded Debian u-boot for a64-olinuxino and the Debian installer root filesystem.

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$ wget2 https://deb.debian.org/debian/dists/trixie/main/installer-arm64/current/images/netboot/SD-card-images/firmware.a64-olinuxino.img.gz
$ wget2 https://deb.debian.org/debian/dists/trixie/main/installer-arm64/current/images/netboot/SD-card-images/partition.img.gz
$ gunzip firmware.a64-olinuxino.img.gz
$ gunzip partition.img.gz
I mounted the root filesystem.

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$ sudo losetup -Pf partition.img
$ losetup -a
/dev/loop0
$ sudo mount /dev/loop0 /mnt
There are two devicetrees for A64-OLinuXino, depending on whether it has eMMC or not. I chose the eMMC version because my board has it. I have not tried leaving it unspecified, even though I was going to install to the microSD card.

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$ ls /mnt/dtbs/allwinner/sun50i-a64-olinuxino*.dtb
/mnt/dtbs/allwinner/sun50i-a64-olinuxino.dtb  /mnt/dtbs/allwinner/sun50i-a64-olinuxino-emmc.dtb
$ echo "fdt /dtbs/allwinner/sun50i-a64-olinuxino-emmc.dtb" | sudo tee -a /mnt/extlinux/extlinux.conf
I added the overlay from my previous post to fix download issues during installation.

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$ sudo cp sun50i-a64-rx-delay.dtbo /mnt/dtbs/
$ echo "fdtoverlays /dtbs/sun50i-a64-rx-delay.dtbo" | sudo tee -a /mnt/extlinux/extlinux.conf
I unmounted the image.

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$ sudo umount /mnt
$ sudo losetup -d /dev/loop0
I found the microSD card device path, wiped its table, and overwritten it with the u-boot and the filesystem. If you want to try the following commands, use the actual path on your system instead of /dev/sdX below.

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$ lsblk
$ sudo umount /dev/sdX1
$ sudo wipefs -a /dev/sdX
$ cat firmware.a64-olinuxino.img partition.img | sudo dd of=/dev/sdX bs=1M status=progress
$ sync
I installed Debian normally and used the defaults. No issues with connectivity when downloading packages.

However, when rebooting after installation, it failed and fell back to booting from eMMC. I inspected the expected offsets on the microSD for u-boot and couldn't find it. It looks like the installer either didn't write it to the correct offset or overwritten it. For a GPT partition table, the offset should be 128KB.

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(parted) print     
Model: SD SA08G (sd/mmc)
Disk /dev/mmcblk0: 7745MB
Sector size (logical/physical): 512B/512B
Partition Table: gpt
Disk Flags:

Number  Start   End     Size    File system     Name  Flags
 1      1049kB  17.8MB  16.8MB
 2      17.8MB  876MB   858MB   ext4                  legacy_boot
 3      876MB   6973MB  6097MB  ext4
 4      6973MB  7744MB  771MB   linux-swap(v1)        swap
I chrooted into the installation, installed "u-boot-sunxi" package, which wasn't installed for some reason, and was surprised by the installation script when trying to run it.

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# u-boot-install-sunxi64 /dev/mmcblk0
/usr/bin/u-boot-install-sunxi64: device/image (/dev/mmcblk0) uses GPT partition table, unusable on sunxi64
"man u-boot-install-sunxi64" states that "GPT partition tables are incompatible with the layout used on sunxi devices". This is wrong for Allwinner A64 SoC in general and for A64-OLinuXino specifically. But I wonder why the installer even chose GPT.

So, Debian only supports MBR. It is necessary to partition the storage manually instead of trusting the installer.

#52

A64 / Re: Status of CVE-2026-31431

Last post by mossroy - May 08, 2026, 08:51:06 PM

And same for Dirty Frag (2026-43284)

#53

FPGA / Re: Stability Issue with GateM...

Last post by charon030 - May 07, 2026, 08:56:14 AM

Hi,
I did some more investigations.
With the design I sent you, core voltage drops from 1.098V to 1.097V. Not a big change, but a change.

I checked the voltage converters and can see that the Olimex board uses converters with 2A output current maximum. At 1.1V this corresponds to 2.2W. However, in the GateMate datasheet they consume already 2W with LFSR shift registers, see page 162 of DS1001. The headroom might be too small, in particular if there are peaks in power consumption. Just as a reference, on the Cologne Chips Devboard they use voltage converters with 3A.

Best regards
Matthias

#54

ESP32 / Re: ESP32-POE-ISO-EA-16MB full...

Last post by Ol!mexGoody - May 06, 2026, 05:54:37 PM

I found the 3D step component for the antenna variant, I replaced the original one with it. You can find both the export and only the component here:

https://ftp.olimex.com/TEMP/ESP32-PoE-ISO-revision-M/

Thanks! I updated the Fusion file with it.

#55

FPGA / Re: Stability Issue with GateM...

Last post by charon030 - May 06, 2026, 11:13:21 AM

Hi,
thanks for the offer. Note that I'm trying to gain experience with the GateMate ecosystem. The design I'm using is not for production or something but more a tool to get to know your board as well as the tool flow.

I can't upload the bit file here but added it to my cloud storage:

https://drive.proton.me/urls/PRH4ANX41R#DGguScyKprlV

You can load it with the "openFPGAloader -c dirtyJtag fract_controller.bit"

All you need to replicate is the following:
- a VGA monitor connected
- a PS/2 keyboard connected

The bit stream internally uses 16 pixel computation units with multipliers and adders.
The design achieves timing closure with 50 MHz target clock (54 MHz timing with "typical" timing setting). Utilization is still moderate:
Info:                  CPE_LT:   22480/  40960    54%
Info:                  CPE_FF:    9949/  40960    24%
Info:               CPE_RAMIO:      15/  40960     0%
Info:                RAM_HALF:       0/     64     0%


What you can see is that there are actually pixels changing their colors but the picture should be really stable. This indicates already that the computations do not finish within one clock period. The reason can be that either the timing models of Cologne Chip are too optimistic in the "typical" case or that the power supply/consumption is causing issues.

What's more: When you move the screen to an area where more computations happen (more toggling in the FPGA), the screen goes black completely. This looks really like an issue with power supply. The screen area causing this is the inner of the fractal (lots of green on the screen). To interact with the fractal, use the keyboard (cursor keys, or F1/F2 to zoom or space for automatic zoom).

If I reapeat the same test with a different parameterization (8 or 12 pixel computation units => less utilization of the FPGA), I neither see the wobbling pixels nor the screen going black.

If you need anything else, let me know.

Thanks a lot
Matthias

#56

ESP32 / Re: ESP32-POE-ISO-EA-16MB full...

Last post by LubOlimex - May 06, 2026, 10:39:40 AM

I found the 3D step component for the antenna variant, I replaced the original one with it. You can find both the export and only the component here:

https://ftp.olimex.com/TEMP/ESP32-PoE-ISO-revision-M/

#57

FPGA / Re: Stability Issue with GateM...

Last post by LubOlimex - May 06, 2026, 08:50:50 AM

Can you think of a way we can replicate it here? Can you give us a project or a file to load and steps to replicate the hang?

We are not very proficient with FPGA and FPGA software development, so if you can provide us with step by step guide to replicate it we are willing to test and perform hardware changes to see if the behavior improves with bigger capacitors and the same software as you.

#58

A64 / Re: Debian GNU/Linux 13 (Trixi...

Last post by Roman - May 05, 2026, 11:02:44 PM

Here is the devicetree overlay which I am currently using in order to fix the Ethernet download issue. I am using it together with sun50i-a64-olinuxino-emmc.dtb devicetree on Guix System originating from the mainline Linux. It should work on Debian too. If you try the overlay, please share how it goes and which revision of the board you use. Choose one of the two devicetrees which Debian ships depending on whether your board has eMMC or not.

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/dts-v1/;
/plugin/;

/ {
    compatible = "allwinner,sun50i-a64";

    fragment@0 {
        target-path = "/soc/ethernet@1c30000";
        __overlay__ {
            allwinner,rx-delay-ps = <200>;
        };
    };
};
You can build it with dtc.

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$ dtc -@ -I dts -O dtb -o sun50i-a64-rx-delay.dtbo sun50i-a64-rx-delay.dts
You should put it somewhere where the bootloader can find it, possibly in /boot, and configure the bootloader to apply it.

#59

ESP32 / Re: ESP32-POE-ISO-EA-16MB full...

Last post by Ol!mexGoody - May 05, 2026, 05:48:17 PM

I am not sure if I understand the first request. Do you want me to export the hardware revision M board, it is pretty much the same and the ESP32e module has the same size just a provision for the u.FL connector.

Yes, the revision M board (less important) with the U.FL connector instead of the PCB antenna (more important)

We don't have a 3D model for the antenna, we purchase it and the manufacturer didn't share one. But these are pretty generic antennas I am sure there should be one available somewhere online.

OK, thanks.

#60

FPGA / Re: Stability Issue with GateM...

Last post by charon030 - May 05, 2026, 12:43:29 PM

Hi Lub,

Thanks for your prompt response.

Actually, I'm running the board in speed mode already and I measured 1.098V.

The only thing I'm guilty of is running timing analysis in typical mode instead of worst mode. Otherwise I don't achieve timing closure, running the design at 50 MHz.

Still, the CologneChip board uses capacitors with much higher capacitance, not only for the core voltage but also for the IP banks and SERDES.

Best regards